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8-Channel 60 MHz 14-Bit High-Speed Synchronous Data Acquisition Instrument
The MP-LD7158R-125M14 is a high-speed multi-channel data acquisition device designed for multi-channel synchronous signal acquisition, waveform recording, and high-speed data processing applications. This series supports 2/4/8-channel synchronous sampling with a 14-bit ADC, and offers selectable per-channel sampling rates of 100/125Msps, with a corresponding input bandwidth of DC–60 MHz (max.). The device is equipped with onboard DDR3 memory, providing 512 MB / 1 GB storage capacity with support for larger capacity customization. Communication interfaces include Gigabit Ethernet, USB 3.0, and 10G optical ports, accommodating various transmission distances, data throughput requirements, and system integration needs. The product supports multiple operating modes including hardware trigger, software trigger, manual trigger, and continuous sampling. A host-computer demonstration software is provided for board configuration, real-time data display, and data storage. The product also supports user-developed secondary integration, with a software development kit (SDK) compatible with C/C++, LabVIEW, MATLAB, and other development environments, and supports Windows and Linux operating systems for easy integration into research and industrial test platforms.
Product features:Multi‑channel synchronous sampling;14‑bit high‑resolution acquisition;Selectable multiple sampling rates;Selectable multiple input ranges;DC–60 MHz input bandwidth;Support for multiple operating systems
Part Number:MP-LD7158R-125M14
Application area:Optical Coherence Tomography (OCT) | Non-destructive testing | Waveform recorders | LiDAR | Multi-channel transient recorders
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Sampling Rate Resolution Bandwidth
125 MS/s 14bit DC–60 MHz

Product Parameters
Sampling rate | 125Msps |
Number of channels | 8 |
Resolution | 14bit |
Input range | ±1,±2,±5,±10v |
Bandwidth | DC-60MHz |
Coupling | AC/DC |
Impedance | 50Ω/1MΩ |
Buffer memory | 1 GB |
Interface | RJ45 |
Detailed Specifications
Ports | ||||||
Analog inputs | 2/4/8 channels, standard SMB connector, SSMA optional | |||||
Trigger input | 1 x SMB | |||||
Trigger output | 1 x SMB | |||||
Sync clock input | 1 x SMB | |||||
Sync clock output | 1 x SMB | |||||
Communication bus | Gigabit Ethernet, USB 3.0, or 10G optical port (selectable) | |||||
I/O resources | 4 banks of I/O, 3.3 V / 5 V level software‑switchable, can supply external power; 2.012P header optional with 2 groups of MLVDS or 2 groups of RS485 (can form RS422 interface) | |||||
Acquisition System | ||||||
Resolution | 14bit | |||||
Bandwidth | DC-50/60MHz | |||||
Input channels | 2/4/8 channels synchronous sampling | |||||
Sampling rate | Up to 100/125Msps | |||||
Sampling modes | Continuous sampling, finite-point sampling | |||||
Full-scale input range | ±1V、±2V、±5V、±10V | |||||
Input coupling | AC/DC | |||||
Input impedance | 50Ω/1MΩ | |||||
Maximum input | ±40Vmax | |||||
Memory | ||||||
Memory capacity | 1GB | |||||
Record length / trigger depth | Software-configurable, total capacity not exceeding memory space | |||||
Performance Parameters | ||||||
Input impedance | Range | SNR | SINAD | SFDR | ENOB | Test conditions |
50Ω | ±2V | 68 | 68 | 70 | 11.1 | Input signal amplitude -1 dBFS, frequency 1 MHz, sampling rate 100/125Msps |
1MΩ | ±2V | 65 | 65 | 68 | 10.5 | |
Trigger Input System | ||||||
Trigger sources | Software trigger, threshold (channel) trigger, external (analog & digital) trigger | |||||
Number of channels | 1 channel, supports analog and digital TTL/LVTTL, input impedance 1 MΩ | |||||
Trigger input level | Analog: ±0.2 V to ±5 V; standard digital TTL/LVTTL levels, square/pulse/trapezoidal waves | |||||
Trigger frequency | ≤2MHz | |||||
Trigger modes | Post-trigger, pre-trigger, delayed trigger; rising-edge, falling-edge, dual-edge trigger | |||||
Trigger threshold adjustment | ±0.2 V to ±5 V, precisely adjustable | |||||
Trigger input pulse width | ≥50ns | |||||
Trigger delay | 0 to 2³¹ sample clock cycles | |||||
Trigger Output | ||||||
Trigger output channel | 1 channel, shared with clock output port | |||||
Trigger output level | LVTTL, output current 10 mA | |||||
Trigger output pulse width | ≥ 50 ns, pulse width adjustable | |||||
Clock System | ||||||
Clock source | Internal / external / external direct-sampling clock | |||||
Internal clock characteristics | 10MHz,±2ppm | |||||
External input clock amplitude | 0.4 Vpp to 3.3 Vpp, sine or square wave | |||||
External input impedance | 50Ω | |||||
External input coupling | AC coupled | |||||
External input frequency range | 10 MHz; 1 MHz to maximum sampling rate @ external direct‑sampling mode | |||||
Clock output | 10 MHz @ LVTTL, derived from the same source as sampling clock | |||||
Power Requirements | ||||||
Power supply method | Adapter, DC005 2.0 mm connector | |||||
Power requirements | Rated voltage 12 V, supports 12–24 V input | |||||
Dimensions & Weight | ||||||
Dimensions (L×W×H) | 200 × 127 × 48 mm | |||||
Weight | ~0.64kg/0.76kg | |||||
Environmental Conditions | ||||||
Operating temperature | 0℃~+50℃ | |||||
Operating relative humidity | 10% to 90% RH, non-condensing | |||||
Storage temperature | -40℃~+85℃ | |||||
Storage relative humidity | 5% to 95% RH, non-condensing | |||||
System Requirements
1. 4 GB RAM, 1 GB hard disk space
2. Monitor resolution >1280×1024
3. Supported operating systems: Windows, Linux, and domestic Chinese OS
Software Development Kit (SDK)
A software development kit is provided to accelerate application development and integration. The MSDK supports Windows, Linux, and other operating systems, and enables secondary integration development with C/C++, MATLAB, LabVIEW, Python, C#, QT, etc. It includes host computer software, interface libraries, demo examples, and development documentation.
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